/*
 * @file     g_spi.h
 * @brief    This file contains all the functions prototypes for the SPI firmware library.
 *
 * Change Logs:
 * Date            Author             Version        Notes
 * 2020-1-22       chengqixiong       V1.0.0         the first version
 */

#ifndef __G_SPI_H__
#define __G_SPI_H__

#ifdef __cplusplus
extern "C" {
#endif

#include "g_1903.h"
#include "g_system.h"

#define IS_SPIx(SPIx)                           (SPIx==MSPI0 || SPIx== MSPI1)

/** @
 * @defgroup SPI_mode
 */
#define SPI_Mode_Master                         ((uint8_t)0)
#define SPI_Mode_Slave                          ((uint8_t)1)
#define IS_SPI_MODE(MODE)                       (((MODE) == SPI_Mode_Master) || \
                                                ((MODE) == SPI_Mode_Slave))

/** @
 * @defgroup SPI_CPHA
 */
#define SPI_CPHA_First_Edge                     ((uint8_t)0)
#define SPI_CPHA_Second_Edge                    ((uint8_t)1)
#define IS_SPI_CPHA(CPHA)                       (((CPHA) == SPI_CPHA_First_Edge) || \
                                                ((CPHA) == SPI_CPHA_Second_Edge))

/** @
 * @defgroup SPI_CPOL
 */
#define  SPI_CPOL_Low                           ((uint8_t)0)
#define  SPI_CPOL_High                          ((uint8_t)1)
#define IS_SPI_CPOL(CPOL)                       (((CPOL) == SPI_CPOL_High) || \
                                                ((CPOL) == SPI_CPOL_Low))

/** @
 * @defgroup G_SPI_RESET
 */
#define  SPI_RESET_OFF                          ((uint8_t)0)
#define  SPI_RESET_ON                           ((uint8_t)1)
#define IS_SPI_RESET(RESET)                     (((RESET) == SPI_RESET_OFF) || \
                                                ((RESET) == SPI_RESET_ON))

/** @
 * @defgroup SPI_DCMIMODE
 */
#define  SPI_DCMIMODE_8                         ((uint8_t)0)
#define  SPI_DCMIMODE_16                        ((uint8_t)1)
#define IS_SPI_DCMIMODE(DCMIMODE)               (((DCMIMODE) == SPI_DCMIMODE_8) || \
                                                ((DCMIMODE) == SPI_DCMIMODE_16))

/** @
 * @defgroup SPI_DMAAUTOTRIG
 */
#define  SPI_DMAAUTOTRIG_DISABLE                ((uint8_t)0)
#define  SPI_DMAAUTOTRIG_ENABLE                 ((uint8_t)1)
#define  IS_SPI_DMAAUTOTRIG(DMAAUTOTRIG)        (((DMAAUTOTRIG) == SPI_DMAAUTOTRIG_DISABLE) || \
                                                ((DMAAUTOTRIG) == SPI_DMAAUTOTRIG_ENABLE))

/** @
 * @defgroup Slv_Bidir_En
 */
#define SPI_SLV_BIDIR_DISABLE                   ((uint8_t)0)
#define SPI_SLV_BIDIR_ENABLE                    ((uint8_t)1)
#define IS_SPI_SLVBIDIR(SLVBIDIR)               (((SLVBIDIR) == SPI_SLV_BIDIR_DISABLE) || \
                                                ((SLVBIDIR) == SPI_SLV_BIDIR_ENABLE))

/** @
 * @defgroup Rx_Phase_Sel
 */
#define SPI_RX_PAHSE_SEL_NORMAL                 ((uint8_t)0)
#define SPI_RX_PHASE_SEL_DELAY                  ((uint8_t)1)
#define SPI_RX_PAHSE_SEL(SEL)                   (((SEL) == SPI_RX_PAHSE_SEL_NORMAL) || \
                                                ((SEL) == SPI_RX_PHASE_SEL_DELAY))

/** @
 * @defgroup FirstBIT_Sel
 */
#define SPI_FIRSTBIT_MSB                        ((uint8_t)0)
#define SPI_FIRSTBIT_LSB                        ((uint8_t)1)
#define IS_SPI_FIRSTBIT(FIRSTBIT)               (((FIRSTBIT) == SPI_FIRSTBIT_MSB) || \
                                                ((FIRSTBIT) == SPI_FIRSTBIT_LSB))

/** @
 * @defgroup WAIT_DMA_EN
 */
#define SPI_WAIT_DMA_DISABLE                    ((uint8_t)0)
#define SPI_WAIT_DMA_ENABLE                     ((uint8_t)1)
#define IS_SPI_WAIT_DMA(WAIT_DMA)               (((WAIT_DMA) == SPI_WAIT_DMA_DISABLE) || \
                                                ((WAIT_DMA) == SPI_WAIT_DMA_ENABLE))

/** @
 * @defgroup SPI_BaudSpeed
 */
#define SPI_BaudRatePrescaler_1                 0
#define SPI_BaudRatePrescaler_2                 1
#define SPI_BaudRatePrescaler_4                 2
#define SPI_BaudRatePrescaler_8                 3
#define SPI_BaudRatePrescaler_16                4
#define SPI_BaudRatePrescaler_32                5
#define SPI_BaudRatePrescaler_64                6
#define SPI_BaudRatePrescaler_128               7
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER)    (((PRESCALER) == SPI_BaudRatePrescaler_1) || \
                                                ((PRESCALER) == SPI_BaudRatePrescaler_2)  || \
                                                ((PRESCALER) == SPI_BaudRatePrescaler_4)  || \
                                                ((PRESCALER) == SPI_BaudRatePrescaler_8)  || \
                                                ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
                                                ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
                                                ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
                                                ((PRESCALER) == SPI_BaudRatePrescaler_128))

/** @
 * @defgroup SPI_BaudSpeed
 */
#define IS_SPI_RW_Delay(x)  (x>0 && x<127)

/**
 * @brief  SPI Init structure definition
 */
typedef struct
{
    uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
                                    used to configure the transmit and receive SCK clock.
                                    This parameter can be a value of @ref SPI_BaudRate_Prescaler.
                                    @note The communication clock is derived from the master
                                    clock. The slave clock does not need to be set. */
    uint32_t Mode;              /*!< Specifies the SPI operating mode. This parameter
                                    can be a value of @ref SPI_mode */

    uint32_t CPHA;              /*!< Specifies the clock active edge for the bit capture.
                                    This parameter can be a value of @ref SPI_Clock_Phase */

    uint32_t CPOL;              /*!< Specifies the serial clock steady state.
                                    This parameter can be a value of @ref SPI_Clock_Polarity */

    uint32_t RESET;

    uint32_t DCMIMODE;

    uint32_t Dmaautotrig;

    uint32_t RW_Delay;          /*!< Specifies the Delay time between send  and receive data,the
                                    value must be 0 to 127 */
    uint32_t Slv_Bidir_En;

    uint32_t RX_Phase_Sel;      /*  0: normal receive sample point
                                    1: receive sample point delay one clock of ahb_bus */
    uint32_t FirstBit_Sel;

    uint32_t Wait_Dma;
} G_SPI_InitTypeDef;

void G_SPI_Init(SPI_TypeDef *SPIx, G_SPI_InitTypeDef* SPI_InitStruct);
void G_SPI_SendData(SPI_TypeDef *SPIx, uint8_t data);
void G_SPI_SendBuff(SPI_TypeDef *SPIx, const uint8_t *buff,uint32_t len);
uint8_t G_SPI_ReceiveData(SPI_TypeDef *SPIx);
void G_SPI_ReceiveBuff(SPI_TypeDef *SPIx, uint8_t *buff, uint32_t len);
void G_SPI_SendAndReceiveData(SPI_TypeDef *SPIx, const uint8_t *TxBuff, uint32_t TxLen, uint8_t *RxBuff, uint32_t RxLen);
void G_SPI_RESET(SPI_TypeDef *SPIx,G_FunctionalState status);
void G_SPI_DCMImode(SPI_TypeDef *SPIx,G_FunctionalState status);
void G_SPI_ITConfig(SPI_TypeDef *SPIx, G_FunctionalState NewState);
void G_SPI_ClearITPendingBit(SPI_TypeDef *SPIx);
void G_SPI_SlaveBufConfig(SPI_TypeDef *SPIx, uint8_t *tbuf, uint32_t tlen, uint8_t *rbuf, uint32_t rlen);

#ifdef __cplusplus
}
#endif

#endif

/************************ (C) COPYRIGHT GKT *****END OF FILE****/
